source: orbit/arduino/libraries/PWM/utility/ATimerDefs.h @ 1f70352

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Last change on this file since 1f70352 was 1f70352, checked in by AzureViolin <zhanghaotz@…>, 9 years ago

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1/*
2Copyright (c) 2012 Sam Knight
3Permission is hereby granted, free of charge, to any person obtaining a copy
4of this software and associated documentation files (the "Software"), to deal
5in the Software without restriction, including without limitation the rights to
6use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
7of the Software, and to permit persons to whom the Software is furnished to do
8so, subject to the following conditions:
9
10The above copyright notice and this permission notice shall be included in all
11copies or substantial portions of the Software.
12
13THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
17WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
18CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
19*/
20
21
22#ifndef ATIMERDEFS_H_
23#define ATIMERDEFS_H_
24
25#if defined(__AVR_ATmega640__) || defined(__AVR_ATmega1280__) || defined(__AVR_ATmega1281__) || defined(__AVR_ATmega2560__) || defined(__AVR_ATmega2561__)
26
27//bit offset from timer 1 in the register
28#define TIMER1_OFFSET   0x00
29#define TIMER3_OFFSET   0x10
30#define TIMER4_OFFSET   0x20
31#define TIMER5_OFFSET   0xA0
32
33//generic register-accessing macros (eliminates some branching)
34#define TCCRA_16(tmr_offset)    _SFR_MEM8(0x80  + tmr_offset)
35#define TCCRB_16(tmr_offset)    _SFR_MEM8(0x81  + tmr_offset)
36#define TCCRC_16(tmr_offset)    _SFR_MEM8(0x82  + tmr_offset)
37#define ICR_16(tmr_offset)              _SFR_MEM16(0x86 + tmr_offset)
38
39//physical memory locations. Used in pwmWrite()
40#define OCR1A_MEM       0x88
41#define OCR1B_MEM       0x8A
42#define OCR1C_MEM       0x8C
43#define OCR3A_MEM       0x98
44#define OCR3B_MEM       0x9A
45#define OCR3C_MEM       0x9C
46#define OCR4A_MEM       0xA8
47#define OCR4B_MEM       0xAA
48#define OCR4C_MEM       0xAC
49#define OCR5A_MEM       0x128
50#define OCR5B_MEM       0x12A
51#define OCR5C_MEM       0x12C
52
53#define OCR0A_MEM       0x47
54#define OCR0B_MEM       0x48
55#define OCR2A_MEM       0xB3
56#define OCR2B_MEM       0xB4
57
58#define TCCR1A_MEM      0x80
59#define TCCR1B_MEM      0x81
60#define TCCR1C_MEM      0x82
61#define TCCR3A_MEM      0x90
62#define TCCR3B_MEM      0x91
63#define TCCR4A_MEM      0xA0
64#define TCCR4B_MEM      0xA1
65#define TCCR4C_MEM      0xA2
66#define TCCR5A_MEM      0x120
67#define TCCR5B_MEM      0x121
68#define TCCR5C_MEM      0x122
69
70#define TCCR0A_MEM      0x44
71#define TCCR0B_MEM      0x45
72#define TCCR2A_MEM      0xB0
73#define TCCR2B_MEM      0xB1
74
75#define ICR1_MEM        0x86
76#define ICR3_MEM        0x96
77#define ICR4_MEM        0xA6
78#define ICR5_MEM        0x126
79
80//8 bit timers
81#define TIMER0_OFFSET   0x00
82#define TIMER2_OFFSET   0x6C
83
84#define TCCRA_8(tmr_offset)             _SFR_MEM8(0x44 + tmr_offset)
85#define TCCRB_8(tmr_offset)             _SFR_MEM8(0x45 + tmr_offset)
86#define OCRA_8(tmr_offset)              _SFR_MEM8(0x47 + tmr_offset)
87
88static const uint16_t pscLst[] = { 0, 1, 8, 64, 256, 1024};
89static const uint16_t pscLst_alt[] = {0, 1, 8, 32, 64, 128, 256, 1024};
90
91struct TimerData //each instance is 4 bytes
92{
93        uint16_t        TimerTopRegLoc:         9;
94        uint16_t        ChannelRegLoc:          9;
95        uint16_t        PinConnectRegLoc:       9;
96        uint8_t         PinConnectBits:         4;
97        bool            Is16Bit:                        1;
98};
99
100//4 bytes each, 18 elements, 72 Bytes total
101const TimerData timer_to_pwm_data[] = {
102        {0, 0, 0, 0},                                                                           //NOT_ON_TIMER
103        {0, 0, 0, 0},                                                                           //TIMER0A       disabled when initialized
104        {OCR0A_MEM, OCR0B_MEM, TCCR0A_MEM, COM0B1, false},      //TIMER0B
105               
106        {ICR1_MEM, OCR1A_MEM, TCCR1A_MEM, COM1A1, true},        //TIMER1A
107        {ICR1_MEM, OCR1B_MEM, TCCR1A_MEM, COM1B1, true},        //TIMER1B       no C channel on timer 1?
108
109        {0, 0, 0, 0, 0},                                                                        //TIMER2       
110        {0, 0, 0, 0, 0},                                                                        //TIMER2A       disabled when initialized
111        {OCR2A_MEM, OCR2B_MEM, TCCR2A_MEM, COM2B1, false},      //TIMER2B
112               
113        {ICR3_MEM, OCR3A_MEM, TCCR3A_MEM, COM3A1, true},        //TIMER3A
114        {ICR3_MEM, OCR3B_MEM, TCCR3A_MEM, COM3B1, true},        //TIMER3B
115        {ICR3_MEM, OCR3C_MEM, TCCR3A_MEM, COM3C1, true},        //TIMER3C
116               
117        {ICR4_MEM, OCR4A_MEM, TCCR4A_MEM, COM4A1, true},        //TIMER4A
118        {ICR4_MEM, OCR4B_MEM, TCCR4A_MEM, COM4B1, true},        //TIMER4B
119        {ICR4_MEM, OCR4C_MEM, TCCR4A_MEM, COM4C1, true},        //TIMER4C
120        {0, 0, 0, 0, 0},                                                                        //TIMER4D       
121               
122        {ICR5_MEM, OCR5A_MEM, TCCR5A_MEM, COM5A1, true},        //TIMER5A
123        {ICR5_MEM, OCR5B_MEM, TCCR5A_MEM, COM5B1, true},        //TIMER5B
124        {ICR5_MEM, OCR5C_MEM, TCCR5A_MEM, COM5C1, true},        //TIMER5C
125};
126
127enum prescaler
128{
129        ps_1    =       1,
130        ps_8    =       2,
131        ps_64   =       3,
132        ps_256  =       4,
133        ps_1024 =       5
134};
135
136//certain 8 bit timers read the CSn register differently
137enum prescaler_alt
138{
139        psalt_1         =       1,
140        psalt_8         =       2,
141        psalt_32        =       3,
142        psalt_64        =       4,
143        psalt_128       =       5,
144        psalt_256       =       6,
145        psalt_1024      =       7
146};
147
148//macros for each timer 'object'
149#define Timer0_GetFrequency()           GetFrequency_8(TIMER0_OFFSET)
150#define Timer0_SetFrequency(x)          SetFrequency_8(TIMER0_OFFSET, x)
151#define Timer0_GetPrescaler()           GetPrescaler_8(TIMER0_OFFSET)
152#define Timer0_SetPrescaler(x)          SetPrescaler_8(TIMER0_OFFSET, x)
153#define Timer0_GetTop()                         GetTop_8(TIMER0_OFFSET)
154#define Timer0_SetTop(x)                        SetTop_8(TIMER0_OFFSET, x)
155#define Timer0_Initialize()                     Initialize_8(TIMER0_OFFSET)
156#define Timer0_GetResolution()          GetResolution_8(TIMER0_OFFSET)
157
158#define Timer1_GetFrequency()           GetFrequency_16(TIMER1_OFFSET)
159#define Timer1_SetFrequency(x)          SetFrequency_16(TIMER1_OFFSET, x)
160#define Timer1_GetPrescaler()           GetPrescaler_16(TIMER1_OFFSET)
161#define Timer1_SetPrescaler(x)          SetPrescaler_16(TIMER1_OFFSET, x)
162#define Timer1_GetTop()                         GetTop_16(TIMER1_OFFSET)
163#define Timer1_SetTop(x)                        SetTop_16(TIMER1_OFFSET, x)
164#define Timer1_Initialize()                     Initialize_16(TIMER1_OFFSET)
165#define Timer1_GetResolution()          GetResolution_16(TIMER1_OFFSET)
166
167#define Timer2_GetFrequency()           GetFrequency_8(TIMER2_OFFSET)
168#define Timer2_SetFrequency(x)          SetFrequency_8(TIMER2_OFFSET, x)
169#define Timer2_GetPrescaler()           GetPrescaler_8(TIMER2_OFFSET)
170#define Timer2_SetPrescaler(x)          SetPrescalerAlt_8(TIMER2_OFFSET, x)
171#define Timer2_GetTop()                         GetTop_8(TIMER2_OFFSET)
172#define Timer2_SetTop(x)                        SetTop_8(TIMER2_OFFSET, x)
173#define Timer2_Initialize()                     Initialize_8(TIMER2_OFFSET)
174#define Timer2_GetResolution()          GetResolution_8(TIMER2_OFFSET)
175
176#define Timer3_GetFrequency()           GetFrequency_16(TIMER3_OFFSET)
177#define Timer3_SetFrequency(x)          SetFrequency_16(TIMER3_OFFSET, x)
178#define Timer3_GetPrescaler()           GetPrescaler_16(TIMER3_OFFSET)
179#define Timer3_SetPrescaler(x)          SetPrescaler_16(TIMER3_OFFSET, x)
180#define Timer3_GetTop()                         GetTop_16(TIMER3_OFFSET)
181#define Timer3_SetTop(x)                        SetTop_16(TIMER3_OFFSET, x)
182#define Timer3_Initialize()                     Initialize_16(TIMER3_OFFSET)
183#define Timer3_GetResolution()          GetResolution_16(TIMER3_OFFSET)
184
185#define Timer4_GetFrequency()           GetFrequency_16(TIMER4_OFFSET)
186#define Timer4_SetFrequency(x)          SetFrequency_16(TIMER4_OFFSET, x)
187#define Timer4_GetPrescaler()           GetPrescaler_16(TIMER4_OFFSET)
188#define Timer4_SetPrescaler(x)          SetPrescaler_16(TIMER4_OFFSET, x)
189#define Timer4_GetTop()                         GetTop_16(TIMER4_OFFSET)
190#define Timer4_SetTop(x)                        SetTop_16(TIMER4_OFFSET, x)
191#define Timer4_Initialize()                     Initialize_16(TIMER4_OFFSET)
192#define Timer4_GetResolution(x)         GetResolution_16(TIMER4_OFFSET)
193
194#define Timer5_GetFrequency()           GetFrequency_16(TIMER5_OFFSET)
195#define Timer5_SetFrequency(x)          SetFrequency_16(TIMER5_OFFSET, x)
196#define Timer5_GetPrescaler()           GetPrescaler_16(TIMER5_OFFSET)
197#define Timer5_SetPrescaler(x)          SetPrescaler_16(TIMER5_OFFSET, x)
198#define Timer5_GetTop()                         GetTop_16(TIMER5_OFFSET)
199#define Timer5_SetTop(x)                        SetTop_16(TIMER5_OFFSET, x)
200#define Timer5_Initialize()                     Initialize_16(TIMER5_OFFSET)
201#define Timer5_GetResolution()          GetResolution_16(TIMER5_OFFSET)
202
203#else
204
205        #error "ATimerDefs.h only supports ATMega640, ATMega1280, ATMega1281, ATMega2560, and ATMega2561"
206#endif
207
208#endif /* ATIMERDEFS_H_ */
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